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(parent: 280899d) | patch
arm64: dts: imx93: add cache info
authorPeng Fan <peng.fan@nxp.com>
Thu, 1 Aug 2024 08:11:11 +0000 (16:11 +0800)
committerShawn Guo <shawnguo@kernel.org>
Tue, 13 Aug 2024 03:20:59 +0000 (11:20 +0800)
commit331c038a95dc17732de3d13b984e9c9aca57724b
tree892c3558bd9ecd6c22177ae7627452ee087dde6atree
parent280899d46f70024033980ec88b97222df354b683commit | diff
arm64: dts: imx93: add cache info

i.MX93 features two Cortex-A55 cores with per core L1 Instruction
cache size 32KB, L1 data cache size 32KB, per core L2 cache 64KB, and
unified 256KB L3 cache.

Add the cache info to remove cacheinfo warnings at boot:
"cacheinfo: Unable to detect cache hierarchy for CPU 0"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx93.dtsi diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)