MIPS: Loongson-3: Fix fp register access if MSA enabled
authorHuacai Chen <chenhc@lemote.com>
Mon, 24 Aug 2020 07:44:03 +0000 (15:44 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 1 Oct 2020 15:36:31 +0000 (17:36 +0200)
commit324f8ff1e09b74fd8c312aa8f5a0bfbdf3a4a79b
tree80a160bb64add146a3ce336f709c50819418b01e
parent482082d22a41545df3203e5ee2fd9c2a1a5e3086
MIPS: Loongson-3: Fix fp register access if MSA enabled

[ Upstream commit 01ce6d4d2c8157b076425e3dd8319948652583c5 ]

If MSA is enabled, FPU_REG_WIDTH is 128 rather than 64, then get_fpr64()
/set_fpr64() in the original unaligned instruction emulation code access
the wrong fp registers. This is because the current code doesn't specify
the correct index field, so fix it.

Fixes: f83e4f9896eff614d0f2547a ("MIPS: Loongson-3: Add some unaligned instructions emulation")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/mips/loongson64/cop2-ex.c