mlxsw: Register physical ports as a devlink resource
authorDanielle Ratson <danieller@nvidia.com>
Thu, 21 Jan 2021 13:10:23 +0000 (15:10 +0200)
committerJakub Kicinski <kuba@kernel.org>
Sat, 23 Jan 2021 04:42:13 +0000 (20:42 -0800)
commit321f7ab0d45899fe0313139822d69c2d5adbb760
treec523d42db83c244ff8d2ad27b54fa11a23e69e37
parent351876424ec12c7ed69527fceaad28b205a7904f
mlxsw: Register physical ports as a devlink resource

The switch ASIC has a limited capacity of physical ('flavour physical'
in devlink terminology) ports that it can support. While each system is
brought up with a different number of ports, this number can be
increased via splitting up to the ASIC's limit.

Expose physical ports as a devlink resource so that user space will have
visibility to the maximum number of ports that can be supported and the
current occupancy.

In addition, add a "Generic Resources" section in devlink-resource
documentation so the different drivers will be aligned by the same resource
name when exposing to user space.

Signed-off-by: Danielle Ratson <danieller@nvidia.com>
Reviewed-by: Jiri Pirko <jiri@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Documentation/networking/devlink/devlink-resource.rst
drivers/net/ethernet/mellanox/mlxsw/core.c
drivers/net/ethernet/mellanox/mlxsw/core.h
drivers/net/ethernet/mellanox/mlxsw/spectrum.h
include/net/devlink.h
net/core/devlink.c