powerpc/603: Switch r0 and r3 in TLB miss handlers
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Tue, 20 Aug 2024 17:23:56 +0000 (19:23 +0200)
committerMichael Ellerman <mpe@ellerman.id.au>
Fri, 30 Aug 2024 11:29:54 +0000 (21:29 +1000)
commit31c0e137ec609f36877ea39cd343ef2476d080aa
tree747a3fcf1f2587bbc542218cec4854b99a543e22
parent82ef440f9a38a1fd7f4854397633a35af33840a5
powerpc/603: Switch r0 and r3 in TLB miss handlers

In preparation of next patch that will perform some additional
calculations to replace comparison, switch the use of r0 and r3
as r0 has some limitations in some instructions like 'addi/subi'.

Also remove outdated comments about the meaning of each register.
The registers are used for many things and it would be difficult
to accurately describe all things done with a given register. The
function is now small enough to get a global view without much
description.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/566af5e87685b1a85d3182549c0d520ce2d8877a.1724173828.git.christophe.leroy@csgroup.eu
arch/powerpc/kernel/head_book3s_32.S