scsi: ufs: host: mediatek: Support clock scaling with Vcore binding
authorPeter Wang <peter.wang@mediatek.com>
Tue, 22 Jul 2025 03:07:23 +0000 (11:07 +0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Fri, 25 Jul 2025 02:20:10 +0000 (22:20 -0400)
commit31a20e9f7c766896fbfea45897969bfd1490b466
treea1ab5bf183bf2e28a8a062b1fe05499cc9e5daf9
parentff40f31216fffc1b7f7e5a9e27a317a29a798289
scsi: ufs: host: mediatek: Support clock scaling with Vcore binding

Add support for clock scaling with Vcore binding:

 1. Parse the DTS setting for Vcore voltage.

 2. Set the Vcore voltage to the DTS-specified value before scaling up.

 3. Reset the Vcore voltage to the default setting after scaling down.

These changes ensure that the Vcore voltage is appropriately managed
during clock scaling operations to maintain system stability and
performance.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Link: https://lore.kernel.org/r/20250722030841.1998783-9-peter.wang@mediatek.com
Reviewed-by: Chun-Hung Wu <chun-hung.wu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/ufs/host/ufs-mediatek.c
drivers/ufs/host/ufs-mediatek.h