clk: tegra: Define Tegra210 DMIC sync clocks
authorPeter De Schrijver <pdeschrijver@nvidia.com>
Tue, 28 Feb 2017 14:37:18 +0000 (16:37 +0200)
committerThierry Reding <treding@nvidia.com>
Mon, 20 Mar 2017 13:06:33 +0000 (14:06 +0100)
commit319af7975c9ff500a30b2e6c4433c1f327283884
tree3859ab89e50cccf6d4eb82ce2ef763718d5cfeb4
parentbfa34832df1fffb79c1719d4016e9cacf0f83b22
clk: tegra: Define Tegra210 DMIC sync clocks

Tegra210 has 3 DMIC inputs which can be clocked from the recovered clock
of several other audio inputs (eg. i2s0, i2s1, ...). To model this, we
add a 3 new clocks similar to the audio* clocks which handle the same
function for the I2S and SPDIF clocks.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-id.h
drivers/clk/tegra/clk-tegra-audio.c
drivers/clk/tegra/clk-tegra210.c
include/dt-bindings/clock/tegra210-car.h