phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 16 Jun 2025 06:25:42 +0000 (08:25 +0200)
committerVinod Koul <vkoul@kernel.org>
Fri, 27 Jun 2025 00:11:08 +0000 (17:11 -0700)
commit304c102cff7382353a28039907a7017bde795db9
tree77b15ca41ca856706357acceb6acb01b88357c1c
parent2bff9083c1744dc8751ddc0844a65e3bee89f519
phy: qcom: qmp-combo: Add missing PLL (VCO) configuration on SM8750

Add missing DP PHY status and VCO clock configuration registers to fix
configuring the VCO rate on SM8750.  Without proper VCO rate setting, it
works on after-reset half of rate which is not enough for DP over USB to
work as seen on logs:

  [drm:msm_dp_ctrl_link_train_1_2] *ERROR* max v_level reached
  [drm:msm_dp_ctrl_link_train_1_2] *ERROR* link training #1 on phy 0 failed. ret=-11

Fixes: c4364048baf4 ("phy: qcom: qmp-combo: Add new PHY sequences for SM8750")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250616062541.7167-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-combo.c