drm/i915/ehl: Define EHL powerwells independently of ICL
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 13 Dec 2019 00:15:09 +0000 (16:15 -0800)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Mon, 16 Dec 2019 09:38:07 +0000 (11:38 +0200)
commit2eeab8eb1e3a04a644cbcb8c568c26c66ea12f02
treec9287a953a495a80218d44992c61e8339910fba2
parent242bff7fc515d8e5275e5b8cd8c9c85a8d037dbf
drm/i915/ehl: Define EHL powerwells independently of ICL

Outputs C and D on EHL are combo PHY outputs and thus should not be
using the same TC AUX power well handlers as ICL.  And even though
icl_combo_phy_aux_power_well_ops works okay for EHL/JSL combo PHYs none
of its special handling is actually necessary for this platform:
 * EHL/JSL don't actually need to program PORT_CL_DW12
 * Display WA #1178 does not apply to EHL/JSL

Thus we can simply drop back to using our standard "hsw-style" power
well ops for EHL AUX power wells.

Bspec: 4301
Fixes: f722b8c1e2a2 ("drm/i915/ehl: All EHL ports are combo phys")
Cc: Jose Souza <jose.souza@intel.com>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Vivek Kasireddy <vivek.kasireddy@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191213001511.678070-2-matthew.d.roper@intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
(cherry picked from commit e8ab8d669d046a8e9b07707d2f00b9ba3e25d0ae)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/display/intel_display_power.c