drm/amd/display: workaround for hard hang on HPD on native DP
authorQingqing Zhuo <qingqing.zhuo@amd.com>
Thu, 22 Jul 2021 18:48:54 +0000 (14:48 -0400)
committerSasha Levin <sashal@kernel.org>
Thu, 26 Aug 2021 12:35:39 +0000 (08:35 -0400)
commit2e6cc93e1b8cf3ec2966961c1e98722ee7281023
treed44167afebbb8d26c108f8e4a2ede25e7fbaecfa
parentdcc8c5fb8d8595f5061c7b000ca1d16449a5e865
drm/amd/display: workaround for hard hang on HPD on native DP

[ Upstream commit c4152b297d56d3696ad0a9003169bc5b98ad7b72 ]

[Why]
HPD disable and enable sequences are not mutually exclusive
on Linux. For HPDs that spans over 1s (i.e. HPD low = 1s),
part of the disable sequence (specifically, a request to SMU
to lower refclk) could come right before the call to PHY
enable, causing DMUB to access an unresponsive PHY
and thus a hard hang on the system.

[How]
Disable 48mhz refclk off on native DP.

Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c