drm/xe: Split MCR initialization
authorMichal Wajdeczko <michal.wajdeczko@intel.com>
Thu, 30 May 2024 11:58:14 +0000 (13:58 +0200)
committerMichal Wajdeczko <michal.wajdeczko@intel.com>
Thu, 30 May 2024 22:02:04 +0000 (00:02 +0200)
commit2d3789e325e6aa91d228aa461c152d8e8f107bc4
tree13fd7310df8bb8bda2ef7f2d00aa8c2b8ff8e37f
parent9d85821a58f4ff2839d7d3290e0256c1b42dd9da
drm/xe: Split MCR initialization

The initialization order of GT topology, MCR, PAT and GuC HWconfig
as done today by native/PF driver, can't be followed as-is by the
VF driver, since fuse registers used in GT topology discovery will
be obtained by the VF driver from the GuC in HWconfig step.

While native/PF drivers need to program the HW PAT table prior to
loading the GuC, this requires only multicast writes support from
the MCR code, which could be initialized separately from the full
MCR support that requires the GT topology to setup steering data.

Split MCR initialization into two steps to avoid introducing VF
specific code paths. This also fixes duplicated spin_lock inits.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: MichaƂ Winiarski <michal.winiarski@intel.com>
Cc: Zhanjun Dong <zhanjun.dong@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240530115814.1284-1-michal.wajdeczko@intel.com
drivers/gpu/drm/xe/xe_gt.c
drivers/gpu/drm/xe/xe_gt_mcr.c
drivers/gpu/drm/xe/xe_gt_mcr.h