crypto: caam/jr - add support for DPAA2 parts
authorHoria Geantă <horia.geanta@nxp.com>
Tue, 18 Jul 2017 15:30:47 +0000 (18:30 +0300)
committerHerbert Xu <herbert@gondor.apana.org.au>
Thu, 3 Aug 2017 05:47:13 +0000 (13:47 +0800)
commit297b9cebd2fc020f0bd3e0aac68b0758ab84e8d8
tree96d62c45c0716972260998f58d8ecc837be94ed4
parente28c190db66830c04b403b7eba7f8a5b53c22ffc
crypto: caam/jr - add support for DPAA2 parts

Add support for using the caam/jr backend on DPAA2-based SoCs.
These have some particularities we have to account for:
-HW S/G format is different
-Management Complex (MC) firmware initializes / manages (partially)
the CAAM block: MCFGR, QI enablement in QICTL, RNG

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/caam/caamhash.c
drivers/crypto/caam/ctrl.c
drivers/crypto/caam/ctrl.h
drivers/crypto/caam/jr.c
drivers/crypto/caam/regs.h
drivers/crypto/caam/sg_sw_qm2.h [new file with mode: 0644]
drivers/crypto/caam/sg_sw_sec4.h