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phy: cadence-torrent: Add PCIe multilink configuration for 100 MHz refclk
authorSwapnil Jakhade <sjakhade@cadence.com>
Mon, 16 Jun 2025 06:47:04 +0000 (12:17 +0530)
committerVinod Koul <vkoul@kernel.org>
Mon, 16 Jun 2025 17:07:19 +0000 (22:37 +0530)
commit240ef19ad78b12e40ec8808694a0b81e6a3a2c2d
treede59aa65718ba5a72463a0f30f6f4c5e02b204d0tree
parent47311eaa0a3be575f7835d99e3767f5ee5940b45commit | diff
phy: cadence-torrent: Add PCIe multilink configuration for 100 MHz refclk

Add register sequences to support PCIe multilink configuration for 100MHz
reference clock. Maximum two PCIe links are supported.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20250616064705.3225758-2-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/cadence/phy-cadence-torrent.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)