drm/i915: don't read or write GEN6_PMIIR on Gen 5
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 12 Jul 2013 22:52:36 +0000 (19:52 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 19 Jul 2013 16:05:14 +0000 (18:05 +0200)
commit221ab43e8abe1e395d4bdd475ee3d4c2548f04ca
tree5eb3ac1cb402d1935f0764926d64a1a7bfa19023
parent9719fb9852e4301d5b8d74feec141d3c3e60fae0
drm/i915: don't read or write GEN6_PMIIR on Gen 5

The register doesn't exist on Gen 5.

v2: Simplify checks since pm_iir is always 0 on Gen 5 (Chris)

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_irq.c