clk: imx7d: create clocks behind rawnand clock gate
authorStefan Agner <stefan@agner.ch>
Thu, 8 Jun 2017 22:34:47 +0000 (15:34 -0700)
committerStephen Boyd <sboyd@codeaurora.org>
Tue, 20 Jun 2017 02:02:41 +0000 (19:02 -0700)
commit22039d150f716e4e56215d70ad23fb92caa4476e
tree1821f452251a54adf1e15b0827811fc2b4fe230f
parent2a8e44dffb152343ccf2ecd26b8a88f999edfd49
clk: imx7d: create clocks behind rawnand clock gate

The rawnand clock gate gates two clocks, NAND_USDHC_BUS_CLK_ROOT
and NAND_CLK_ROOT. However, the gate has been in the chain of the
latter only. This does not allow to use the NAND_USDHC_BUS_CLK_ROOT
only, e.g. as required by APBH-Bridge-DMA.

Add new clocks which represent the clock after the gate, and use a
shared clock gate to correctly model the hardware.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/imx/clk-imx7d.c
include/dt-bindings/clock/imx7d-clock.h