selftests/powerpc/pmu: Add selftest for group constraint check for MMCR0 l2l3_sel...
authorKajol Jain <kjain@linux.ibm.com>
Fri, 10 Jun 2022 13:41:07 +0000 (19:11 +0530)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 28 Jun 2022 22:57:44 +0000 (08:57 +1000)
commit20b3073f8727e20332379f145b6eecf580291b2c
treed95288b47e2a1f48ee0eca0340429ca07ac05dc9
parent8efeedf5aac77b58f68e6eb9df62758ba1882bb3
selftests/powerpc/pmu: Add selftest for group constraint check for MMCR0 l2l3_sel bits

In power10, L2L3 select bits in the event code is used to program
l2l3_sel field in Monitor Mode Control Register 0 (MMCR0: 56-60). When
scheduling events as a group, all events in that group should match
value in these bits. Otherwise event open for the sibling events will
fail.

Testcase uses event code "0x010000046080" as leader and another events
"0x26880" and "0x010000026880" as sibling events, and checks for
l2l3_sel constraints via perf interface for ISA v3.1 platform.

Signed-off-by: Kajol Jain <kjain@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220610134113.62991-30-atrajeev@linux.vnet.ibm.com
tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_l2l3_sel_test.c [new file with mode: 0644]