arm64: dts: renesas: sparrow-hawk: Describe split PCIe clock
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 7 Jun 2025 19:44:39 +0000 (21:44 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 19 Jun 2025 17:50:19 +0000 (19:50 +0200)
commit20b02acbd89e4fc883670a7f7f517fc0a11bb5f7
treefb329d46d1a6adf733a9e8f5babf651cad78f24c
parent714dd09f0ec7d58eebe62c5bdb45ca8809e020f3
arm64: dts: renesas: sparrow-hawk: Describe split PCIe clock

The Sparrow Hawk board supplies the PCIe controller input clock and PCIe
bus clock from separate outputs of the Renesas 9FGV0441 clock generator.
Describe this split bus configuration in the board DT.
The topology looks as follows:

     ____________                    _____________
    | R-Car PCIe |                  | PCIe device |
    |            |                  |             |
    |    PCIe RX<|==================|>PCIe TX     |
    |    PCIe TX<|==================|>PCIe RX     |
    |            |                  |             |
    |   PCIe CLK<|======..  ..======|>PCIe CLK    |
    '------------'      ||  ||      '-------------'
||  ||
     ____________       ||  ||
    |  9FGV0441  |      ||  ||
    |            |      ||  ||
    |   CLK DIF0<|======''  ||
    |   CLK DIF1<|==========''
    |   CLK DIF2<|
    |   CLK DIF3<|
    '------------'

Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/20250607194541.79176-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts