drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver
authorJunhao He <hejunhao3@huawei.com>
Thu, 19 Jun 2025 12:55:53 +0000 (20:55 +0800)
committerWill Deacon <will@kernel.org>
Mon, 14 Jul 2025 14:42:16 +0000 (15:42 +0100)
commit1fd20ba0a1dcaf3bf8757c0e0b8ff754ab25b228
tree19a44b55dfcc9a3b317139ac12c5604dc1dd9357
parent29614c55fe6ff8e5ddee9c6247d5c3dbe05ca8bc
drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver

SLLC v3 PMU has the following changes compared to previous version:
a) update the register layout
b) update the definition of SRCID_CTRL and TGTID_CTRL registers.
   To be compatible with v2, we use maximum width (11 bits)
   and mask the extra length for themselves.
c) remove latency events (driver does not need to be adapted).

SLLC v3 PMU is identified with HID HISI0264.

Signed-off-by: Junhao He <hejunhao3@huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Link: https://lore.kernel.org/r/20250619125557.57372-5-yangyicong@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c