riscv: switch to relative extable and other improvements
authorPalmer Dabbelt <palmer@rivosinc.com>
Thu, 6 Jan 2022 03:14:31 +0000 (19:14 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 6 Jan 2022 03:15:10 +0000 (19:15 -0800)
commit1f77ed9422cbc41e1a5d17654b7e527a4a23b665
tree7a54ac220f5f6a1d7591539e68d736e64010b2c5
parentdacef016c088f8f69fe1e6e5feab3543df3dab83
parenta2ceb8c4efce97a9392084f45c072b0ec8e36701
riscv: switch to relative extable and other improvements

Similar as other architectures such as arm64, x86 and so on, use
offsets relative to the exception table entry values rather than
absolute addresses for both the exception locationand the fixup.
And recently, arm64 and x86 remove anonymous out-of-line fixups, we
want to acchieve the same result.