riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format
authorInochi Amaoto <inochiama@outlook.com>
Fri, 26 Jan 2024 09:20:00 +0000 (17:20 +0800)
committerArnd Bergmann <arnd@arndb.de>
Fri, 26 Jan 2024 12:33:52 +0000 (13:33 +0100)
commit1f4a994be2c3d13852fd5c1054f292bd303352cc
tree119de831be5569a5c7422c2ac0f98a9b1df57c0c
parent0d1d824a4ac102db35bc8524a8be97ada8ad37ab
riscv: dts: sophgo: separate sg2042 mtime and mtimecmp to fit aclint format

Change the timer layout in the dtb to fit the format that needed by
the SBI.

Fixes: 967a94a92aaa ("riscv: dts: add initial Sophgo SG2042 SoC device tree")
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/riscv/boot/dts/sophgo/sg2042.dtsi