drm/amd/display: Fallback to clocks which meet requested voltage on DCN31
authorMichael Strauss <michael.strauss@amd.com>
Thu, 21 Oct 2021 17:27:16 +0000 (13:27 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 28 Oct 2021 18:26:50 +0000 (14:26 -0400)
commit1e5588d14065eeb154ef15fbe3f74ace9460a386
tree8df17555428de49224e9bd1e72d07a58b205355a
parent31484207feb23e6cdb12827560442ab294855923
drm/amd/display: Fallback to clocks which meet requested voltage on DCN31

[WHY]
On certain configs, SMU clock table voltages don't match which cause parser
to behave incorrectly by leaving dcfclk and socclk table entries unpopulated.

[HOW]
Currently the function that finds the corresponding clock for a given voltage
only checks for exact voltage level matches. In the case that no match gets
found, parser now falls back to searching for the max clock which meets the
requested voltage (i.e. its corresponding voltage is below requested).

Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c