mmc: sdhci: Add PLL Enable support to internal clock setup
authorBen Chuang <ben.chuang@genesyslogic.com.tw>
Tue, 27 Aug 2019 00:32:55 +0000 (08:32 +0800)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 11 Sep 2019 13:58:39 +0000 (15:58 +0200)
commit1beabbdba708bc9b6d7fc04695cc98d1287d92f2
treef309d239cbdbcd76d505ad5fdc812664cf3fbdd0
parent4a9e0d1a6256024582c225ce0d86b51e109062c4
mmc: sdhci: Add PLL Enable support to internal clock setup

The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable
setup as part of the internal clock setup as described in 3.2.1 Internal
Clock Setup Sequence of SD Host Controller Simplified Specification
Version 4.20.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Co-developed-by: Michael K Johnson <johnsonm@danlj.org>
Signed-off-by: Michael K Johnson <johnsonm@danlj.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci.c
drivers/mmc/host/sdhci.h