clk: spacemit: Add clock support for SpacemiT K1 SoC
authorHaylen Chu <heylenay@4d2.org>
Wed, 16 Apr 2025 13:54:03 +0000 (13:54 +0000)
committerYixun Lan <dlan@gentoo.org>
Wed, 16 Apr 2025 19:22:53 +0000 (03:22 +0800)
commit1b72c59db0add8e47fa116b21f78ed0b09a264f3
tree0f95ec6f7a9482f8a94d6831b9bc35e92b84364c
parent8090804045066ab8cd92737c8e2adfb46f166c0f
clk: spacemit: Add clock support for SpacemiT K1 SoC

The clock tree of K1 SoC contains three main types of clock hardware
(PLL/DDN/MIX) and has control registers split into several multifunction
devices: APBS (PLLs), MPMU, APBC and APMU.

All register operations are done through regmap to ensure atomicity
between concurrent operations of clock driver and reset,
power-domain driver that will be introduced in the future.

Signed-off-by: Haylen Chu <heylenay@4d2.org>
Reviewed-by: Alex Elder <elder@riscstar.com>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250416135406.16284-4-heylenay@4d2.org
Signed-off-by: Yixun Lan <dlan@gentoo.org>
12 files changed:
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/spacemit/Kconfig [new file with mode: 0644]
drivers/clk/spacemit/Makefile [new file with mode: 0644]
drivers/clk/spacemit/ccu-k1.c [new file with mode: 0644]
drivers/clk/spacemit/ccu_common.h [new file with mode: 0644]
drivers/clk/spacemit/ccu_ddn.c [new file with mode: 0644]
drivers/clk/spacemit/ccu_ddn.h [new file with mode: 0644]
drivers/clk/spacemit/ccu_mix.c [new file with mode: 0644]
drivers/clk/spacemit/ccu_mix.h [new file with mode: 0644]
drivers/clk/spacemit/ccu_pll.c [new file with mode: 0644]
drivers/clk/spacemit/ccu_pll.h [new file with mode: 0644]