dt-bindings: clock: qcom,sm8450-videocc: Add MXC power domain
authorJagadeesh Kona <quic_jkona@quicinc.com>
Fri, 30 May 2025 13:20:46 +0000 (18:50 +0530)
committerBjorn Andersson <andersson@kernel.org>
Tue, 10 Jun 2025 17:59:19 +0000 (12:59 -0500)
commit1a42f4d4bb92ea961c58599bac837fb8b377a296
tree787e8dba62bbfbd32bd4746c0f5ad1598bd729df
parent19272b37aa4f83ca52bdf9c16d5d81bdd1354494
dt-bindings: clock: qcom,sm8450-videocc: Add MXC power domain

To configure the video PLLs and enable the video GDSCs on SM8450,
SM8475, SM8550 and SM8650 platforms, the MXC rail must be ON along
with MMCX. Therefore, update the videocc bindings to include
the MXC power domain on these platforms.

Fixes: 1e910b2ba0ed ("dt-bindings: clock: qcom: Add SM8450 video clock controller")
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250530-videocc-pll-multi-pd-voting-v5-1-02303b3a582d@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml