drm/i915/cx0_phy_regs: Add C10 registers bits
authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Wed, 22 Jan 2025 16:28:50 +0000 (21:58 +0530)
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Thu, 23 Jan 2025 04:27:26 +0000 (09:57 +0530)
commit18176f56942a596c5d03ed69ef30ad72f67a7edc
tree1730d049d1eb2814cc8ffb5d99715eb2ad930685
parent560de03d15c06a3c17b20733a5b200ac0f78ae40
drm/i915/cx0_phy_regs: Add C10 registers bits

Add C10 register bits to be used for computing HDMI PLLs with
algorithm.

v2: Add bspec reference. (Suraj)
v3: Use REG_BIT8 like other reg bits/masks. (Jani)

Bspec: 74166
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250122162850.1861410-1-ankit.k.nautiyal@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h