drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver
authorJunhao He <hejunhao3@huawei.com>
Thu, 19 Jun 2025 12:55:51 +0000 (20:55 +0800)
committerWill Deacon <will@kernel.org>
Mon, 14 Jul 2025 14:42:16 +0000 (15:42 +0100)
commit17aa34e86936d0dba4e7c05c55ffc3e12c0ccec9
tree4d23cc95cffe4ec2502afa72614cb82d8b88e3b3
parentdc86791ff68c38a2954c3bf2c444b6d6d9da52f3
drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver

HiSilicon DDRC v3 PMU has the different interrupt register offset
compared to the v2. Add device information of v3 PMU with ACPI
HID HISI0235.

Signed-off-by: Junhao He <hejunhao3@huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Link: https://lore.kernel.org/r/20250619125557.57372-3-yangyicong@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c