x86/cpu: Restore AMD's DE_CFG MSR after resume
authorBorislav Petkov <bp@suse.de>
Mon, 14 Nov 2022 11:44:01 +0000 (12:44 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 16 Nov 2022 08:57:20 +0000 (09:57 +0100)
commit154d744fbefcd13648ff036db2d185319afa74dc
tree19d589aec6ba13c474288bdbe13ec90c1f4e1def
parente7294b01de40eb34bed65f376986181fcdeca0cd
x86/cpu: Restore AMD's DE_CFG MSR after resume

commit 2632daebafd04746b4b96c2f26a6021bc38f6209 upstream.

DE_CFG contains the LFENCE serializing bit, restore it on resume too.
This is relevant to older families due to the way how they do S3.

Unify and correct naming while at it.

Fixes: e4d0e84e4907 ("x86/cpu/AMD: Make LFENCE a serializing instruction")
Reported-by: Andrew Cooper <Andrew.Cooper3@citrix.com>
Reported-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: <stable@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/include/asm/msr-index.h
arch/x86/kernel/cpu/amd.c
arch/x86/kernel/cpu/hygon.c
arch/x86/kvm/svm/svm.c
arch/x86/kvm/x86.c
arch/x86/power/cpu.c
tools/arch/x86/include/asm/msr-index.h