drm/amd/display: Fix detection of aligned DMUB firmware meta info
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Thu, 4 Nov 2021 20:52:00 +0000 (16:52 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 17 Nov 2021 21:58:06 +0000 (16:58 -0500)
commit1328e395fd62070a29dbf28435ef8da1ba780e6c
treec3445986dee44f8525e23ad9c085b0bfaf120c51
parentcfd3f70ebd9e761754da8ab195ef7ff476d5cb25
drm/amd/display: Fix detection of aligned DMUB firmware meta info

[Why]
A built firmware binary may be aligned to 16-bytes with padding at the
end as necessary. In the case that padding was applied the meta info
will not be detected correctly and we won't be able to allocate the
appropriate firmware and tracebuffer sizes.

[How]
To maintain compatibility with already released firmware where this
occurs we need to try every meta offset from 0..15 inclusive.

Extract out the meta info checker into a helper function that's called
for each of these offsets and exit early when we've found it.

Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c