pinctrl: qcom: Fix PINGROUP definition for sm8750
authorMaulik Shah <maulik.shah@oss.qualcomm.com>
Tue, 29 Apr 2025 04:02:29 +0000 (09:32 +0530)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 29 Apr 2025 08:27:25 +0000 (10:27 +0200)
commit12b8a672d2aa053064151659f49e7310674d42d3
tree5c51c976c7977a1e1021474a76206c3c84466d7c
parent446d28584723e5d4bcdb18cf6ef87cb2bb597dd8
pinctrl: qcom: Fix PINGROUP definition for sm8750

On newer SoCs intr_target_bit position is at 8 instead of 5. Fix it.

Also add missing intr_wakeup_present_bit and intr_wakeup_enable_bit which
enables forwarding of GPIO interrupts to parent PDC interrupt controller.

Fixes: afe9803e3b82 ("pinctrl: qcom: Add sm8750 pinctrl driver")
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Melody Olvera <melody.olvera@oss.qualcomm.com>
Link: https://lore.kernel.org/20250429-pinctrl_sm8750-v2-1-87d45dd3bd82@oss.qualcomm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/qcom/pinctrl-sm8750.c