drm/i915: Enable render context support for Ironlake (gen5)
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 19 Apr 2019 11:17:48 +0000 (12:17 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 26 Apr 2019 10:39:17 +0000 (11:39 +0100)
commit1215d28e722ce27172de7708ead6824fcfb19364
tree3d5c96865143b247accc8cf96ef1c985ef429e84
parent928f8f42310f244501a7c70daac82c196112c190
drm/i915: Enable render context support for Ironlake (gen5)

Ironlake does support being able to saving and reloading context specific
registers between contexts, providing isolation of the basic GPU state
(as programmable by userspace). This allows userspace to assume that the
GPU retains their state from one batch to the next, minimising the
amount of state it needs to reload, or manually save and restore.

v2: Fix off-by-one in reading CXT_SIZE, and add a comment that the
CXT_SIZE and context-layout do not match in bspec, but the difference is
irrelevant as we overallocate the full page anyway (Ville).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190419111749.3910-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gt/intel_engine_cs.c
drivers/gpu/drm/i915/gt/intel_ringbuffer.c