x86/perf: Avoid warning for Arch LBR without XSAVE
authorAndi Kleen <ak@linux.intel.com>
Wed, 15 Dec 2021 20:40:29 +0000 (12:40 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 16 Feb 2022 11:54:18 +0000 (12:54 +0100)
commit0d6b9d15ecb48be86d668af52030200469f21b8e
tree2dcd79e8afc93f8e50e18d266cd1fd26860aa2de
parentb37dd03f2fc6fa44ea19b0f273db97f00dc2e8d1
x86/perf: Avoid warning for Arch LBR without XSAVE

[ Upstream commit 8c16dc047b5dd8f7b3bf4584fa75733ea0dde7dc ]

Some hypervisors support Arch LBR, but without the LBR XSAVE support.
The current Arch LBR init code prints a warning when the xsave size (0) is
unexpected. Avoid printing the warning for the "no LBR XSAVE" case.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20211215204029.150686-1-ak@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/x86/events/intel/lbr.c