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arm64: dts: cavium: thunder2: Add missing PL011 "uartclk"
authorRob Herring (Arm) <robh@kernel.org>
Mon, 9 Jun 2025 21:57:06 +0000 (16:57 -0500)
committerArnd Bergmann <arnd@arndb.de>
Thu, 3 Jul 2025 14:29:45 +0000 (16:29 +0200)
commit0d495db1b9bd4c3eefc201c5e1c92fd1b96ecf2e
treeccd664e2bea839cab5e6c4a833900b330b29a3f6tree
parentf060fee24a52d6d9d6c0d963c24da7f2b42a3d5dcommit | diff
arm64: dts: cavium: thunder2: Add missing PL011 "uartclk"

The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
Thunder2 SoC is missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250609215706.3009692-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)