drm/i915: Limit the display memory alignment to 32 bit instead of 64
authorAndi Shyti <andi.shyti@linux.intel.com>
Wed, 30 Nov 2022 23:58:01 +0000 (00:58 +0100)
committerAndi Shyti <andi.shyti@linux.intel.com>
Tue, 6 Dec 2022 09:52:41 +0000 (10:52 +0100)
commit09f9b4418e417b6452d1bcd7a9544a68fc1e59d5
tree6ccdd48748ef6c98bf1adc8f7ea58e74dfe225e9
parentf2053d346615f2c6bb4c0663276274b2da3f6871
drm/i915: Limit the display memory alignment to 32 bit instead of 64

The coming commit "drm/i915: Introduce guard pages to i915_vma"
from Chris, was originally changing display_alignment to u32
from u64. The reason is that the display GGTT is and will be
limited o 4GB.

Put it in a separate patch and use "max(...)" instead of
"max_t(64, ...)" when asigning the value. We can safely use max
as we know beforehand that the comparison is between two u32
variables.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221130235805.221010-2-andi.shyti@linux.intel.com
drivers/gpu/drm/i915/display/intel_fb_pin.c
drivers/gpu/drm/i915/gem/i915_gem_domain.c
drivers/gpu/drm/i915/i915_vma_types.h