drm/i915/fbc: Allow higher compression limits on FBC1
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 21 Sep 2021 15:25:17 +0000 (18:25 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 24 Sep 2021 12:55:02 +0000 (15:55 +0300)
commit09bbdd8730dce85db1d945961dbf0ea4066eb6d6
treea6b510548dea3175dc3105e156bfcd81707cf4ee
parent5f524aea39d9e2a74c063f340a77516e454badce
drm/i915/fbc: Allow higher compression limits on FBC1

On FBC1 we can specify an arbitrary cfb stride. The hw will
simply throw away any compressed line that would exceed the
specified limit and keep using the uncompressed data instead.
Thus we can allow arbitrary compression limits.

The one thing we have to keep in mind though is that the cfb
stride is specified in units of 32B (gen2) or 64B (gen3+).
Fortunately X-tile is already 128B (gen2) or 512B (gen3+) wide
so as long as we limit outselves to the same 4x compression
limit that FBC2 has we are guaranteed to have a sufficiently
aligned cfb stride.

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210921152517.803-5-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/display/intel_fbc.c