PCI: imx6: Add PLL lock check for i.MX95 SoC
authorRichard Zhu <hongxing.zhu@nxp.com>
Wed, 16 Apr 2025 08:13:13 +0000 (16:13 +0800)
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Sun, 27 Apr 2025 11:46:32 +0000 (17:16 +0530)
commit047e8b6b3bc3e6b25bfa12896a39d9fb82b591be
tree5ed21c98245dc90cd9da7f050a51cc38b095ddd5
parent744a1c20ce933dcaca0f161fe7da115902a2f343
PCI: imx6: Add PLL lock check for i.MX95 SoC

PLL lock is required to ensure that the PLL clock is stable before enabling
the controller in i.MX95 SoC.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
[mani: subject and description rewording]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://patch.msgid.link/20250416081314.3929794-7-hongxing.zhu@nxp.com
drivers/pci/controller/dwc/pci-imx6.c