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powerpc/dts/fsl: t2080rdb: reorder the Cortina PHY XFI lanes
authorCamelia Groza <camelia.groza@nxp.com>
Thu, 20 Sep 2018 11:47:01 +0000 (14:47 +0300)
committerScott Wood <oss@buserror.net>
Sat, 20 Oct 2018 23:23:56 +0000 (18:23 -0500)
commit0400d65501930e6e99848572b3818914c3b94256
tree90544b9ecadb7956583dda6650d6cf4f486aabeetree | snapshot
parenta0e102914aa3f619a5bc68a0d33e17d1788cdf4ccommit | diff
powerpc/dts/fsl: t2080rdb: reorder the Cortina PHY XFI lanes

According to the T2080RDB schematics, for the CS4315 PHY, the XFI 1 lane is
connected to SFP 2 and the XFI 2 lane is connected to SFP 1. Change the
device tree to reflect the correct PHY order and port association.

Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
arch/powerpc/boot/dts/fsl/t2080rdb.dts diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)