drm/i915: Add hardware csc readout for ilk+
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 29 Mar 2023 13:49:58 +0000 (16:49 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 11 Apr 2023 06:33:43 +0000 (09:33 +0300)
commit01c2be8e1b97ee4891d1e1ffb7758897d441bb3c
treeae9dec4cb1dc315e3357ff547dd3a21402194cb3
parente006df050606785aa7d04cd47f913d9c6ce4669d
drm/i915: Add hardware csc readout for ilk+

Read out the pipe/output csc matrices on ilk+ and stash the results
(in the hardware specific format) into the appropriate place
in the crtc state.

Note that on skl/glk/icl the pipe csc unit suffers from an issue
where *reads* of the coefficient/offset registers also disarm
the double buffer update (if currently armed via CSC_MODE write).
So it's rather important that the readout only happens after the
csc registers have been latched. Fortunately the state checker
only runs after the start of vblank where the latching happens.

And on skl/glk the DMC + CSC register read has the potential to
corrupt the latched CSC register values, so let's add a comment
reminding us that the DC states should remain off until the
readout has been completed.

TODO: maybe we could somehow check to make sure PSR has in fact
latched the new register values already, and that DC states
have been off all along?

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230329135002.3096-9-ville.syrjala@linux.intel.com
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
drivers/gpu/drm/i915/display/intel_color.c
drivers/gpu/drm/i915/display/intel_display.c