drm/amd/display: Add hubp cache reset when powergating
authorAric Cyr <Aric.Cyr@amd.com>
Thu, 9 Jan 2025 20:03:48 +0000 (15:03 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 24 Jan 2025 14:56:22 +0000 (09:56 -0500)
commit01130f5260e5868fb6b15ab8c00dbc894139f48e
tree58e65b35b1bb2373c66d2a9a1e22b72af30a49f1
parent335acfb64eb88eb638e2adc8ba5bfa530f2dd20d
drm/amd/display: Add hubp cache reset when powergating

[Why]
When HUBP is power gated, the SW state can get out of sync with the
hardware state causing cursor to not be programmed correctly.

[How]
Similar to DPP, add a HUBP reset function which is called wherever
HUBP is initialized or powergated.  This function will clear the cursor
position and attribute cache allowing for proper programming when the
HUBP is brought back up.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Sung Lee <sung.lee@amd.com>
Signed-off-by: Aric Cyr <Aric.Cyr@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
14 files changed:
drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c
drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c
drivers/gpu/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h
drivers/gpu/drm/amd/display/dc/hubp/dcn20/dcn20_hubp.c
drivers/gpu/drm/amd/display/dc/hubp/dcn201/dcn201_hubp.c
drivers/gpu/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c
drivers/gpu/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c
drivers/gpu/drm/amd/display/dc/hubp/dcn31/dcn31_hubp.c
drivers/gpu/drm/amd/display/dc/hubp/dcn32/dcn32_hubp.c
drivers/gpu/drm/amd/display/dc/hubp/dcn35/dcn35_hubp.c
drivers/gpu/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h