net/mlx5e: Expose FEC feilds and related capability bit
authorAya Levin <ayal@mellanox.com>
Mon, 30 Dec 2019 12:22:57 +0000 (14:22 +0200)
committerSaeed Mahameed <saeedm@mellanox.com>
Thu, 16 Jan 2020 22:11:30 +0000 (14:11 -0800)
commita58837f52d432f32995b1c00e803cc4db18762d3
tree06d0f2c3ae354a74c6f357ff95c9a047566e7cd4
parent822e114b50641d3b57d2eb30939e60d8b4758288
net/mlx5e: Expose FEC feilds and related capability bit

Introduce 50G per lane FEC modes capability bit and newly supported
fields in PPLM register which allow this configuration.

Signed-off-by: Aya Levin <ayal@mellanox.com>
Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
include/linux/mlx5/mlx5_ifc.h