drm/i915: Sanitycheck MMIO access early in driver load
authorMatt Roper <matthew.d.roper@intel.com>
Mon, 27 Mar 2023 19:55:46 +0000 (21:55 +0200)
committerAndi Shyti <andi.shyti@linux.intel.com>
Tue, 28 Mar 2023 09:22:05 +0000 (11:22 +0200)
commitde4149730d9d72f50d4e6dfedad0d11b1df05b7e
treed0a16e29e2e2752a80374c4368c002ea22f69bd2
parent5dff5d092ba6c5485aac1467dad938c74ba6ed57
drm/i915: Sanitycheck MMIO access early in driver load

We occasionally see the PCI device in a non-accessible state at the
point the driver is loaded.  When this happens, all BAR accesses will
read back as 0xFFFFFFFF.  Rather than reading registers and
misinterpreting their (invalid) values, let's specifically check for
0xFFFFFFFF in a register that cannot have that value to see if the
device is accessible.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230327195547.356584-2-andi.shyti@linux.intel.com
drivers/gpu/drm/i915/intel_uncore.c