drm/i915: Track GGTT writes on the vma
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 6 Dec 2017 12:49:14 +0000 (12:49 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 7 Dec 2017 14:01:59 +0000 (14:01 +0000)
commit7125397b82460d74ae0584bdcdc006deec5e895d
tree79557f1d4c49feec8442b072dbd44945d3e904cf
parent010e3e68cd9cb65ea50c0af605e966cda333cb2a
drm/i915: Track GGTT writes on the vma

As writes through the GTT and GGTT PTE updates do not share the same
path, they are not strictly ordered and so we must explicitly flush the
indirect writes prior to modifying the PTE. We do track outstanding GGTT
writes on the object itself, but since the object may have multiple GGTT
vma, that is overly coarse as we can track and flush individual vma as
required.

Whilst here, update the GGTT flushing behaviour for Cannonlake.

v2: Hard-code ring offset to allow use during unload (after RCS may have
been freed, or never existed!)

References: https://bugs.freedesktop.org/show_bug.cgi?id=104002
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171206124914.19960-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_vma.c
drivers/gpu/drm/i915/i915_vma.h