drm/i915/mtl: Fix Wa_16015201720 implementation
authorRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Wed, 1 Mar 2023 20:10:49 +0000 (12:10 -0800)
committerRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Thu, 9 Mar 2023 17:40:17 +0000 (09:40 -0800)
commit0188be507b973e36f637ba010a369057c8cb7282
tree82be942bda5816b14feb1a5d611cfbd36e1d67c6
parent4b736ed40583631e0cf32c55dbc1e5ec0434a74b
drm/i915/mtl: Fix Wa_16015201720 implementation

The commit 2357f2b271ad ("drm/i915/mtl: Initial display workarounds")
extended the workaround Wa_16015201720 to MTL. However the registers
that the original WA implemented moved for MTL.

Implement the workaround with the correct register.

v3: Skip clock gating for pipe C, D DMC's and fix the title

Fixes: 2357f2b271ad ("drm/i915/mtl: Initial display workarounds")
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230301201053.928709-2-radhakrishna.sripada@intel.com
drivers/gpu/drm/i915/display/intel_dmc.c
drivers/gpu/drm/i915/i915_reg.h