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(parent: 525d12f) | patch
fpga: zynq-fpga: Fix unbalanced clock handling
authorMoritz Fischer <moritz.fischer@ettus.com>
Mon, 19 Oct 2015 20:35:33 +0000 (13:35 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 23 Oct 2015 23:49:12 +0000 (16:49 -0700)
commit6376931babd833dbd6f51e22a3de449ce6c60d61
tree6d77e97b618dfccd144e84227fa84803ebd491b2tree | snapshot
parent525d12f27bb05c4255857849a8d28c0c086bd28ecommit | diff
fpga: zynq-fpga: Fix unbalanced clock handling

This commit fixes the unbalanced clock handling, where
a failed probe would leave the clock with an enable count of -1.

Reported-by: Josh Cartwright <joshc@ni.com>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/fpga/zynq-fpga.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)