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clk: samsung: exynos5433: Add clocks for CMU_MSCL domain
authorChanwoo Choi <cw00.choi@samsung.com>
Tue, 3 Feb 2015 00:13:51 +0000 (09:13 +0900)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Thu, 5 Feb 2015 18:30:57 +0000 (19:30 +0100)
commitb274bbfd8b4a94cb5bd6fe21801264a27dd8ec75
tree7e19aa9e3e7e77605c6ef692c1f6ce1f475f1db4tree | snapshot
parent6c5d76d15ab6da9b30af020a44e071eb5145e1a0commit | diff
clk: samsung: exynos5433: Add clocks for CMU_MSCL domain

This patch adds the mux/divider/gate clocks for CMU_MSCL domain which
generates the clocks for M2M (Memory to Memory) scaler, JPEG IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Documentation/devicetree/bindings/clock/exynos5433-clock.txt diff | blob | blame | history
drivers/clk/samsung/clk-exynos5433.c diff | blob | blame | history
include/dt-bindings/clock/exynos5433.h diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)