clk: qcom: Add APCS clock controller support
authorGeorgi Djakov <georgi.djakov@linaro.org>
Tue, 5 Dec 2017 15:47:01 +0000 (17:47 +0200)
committerStephen Boyd <sboyd@codeaurora.org>
Tue, 2 Jan 2018 18:00:25 +0000 (10:00 -0800)
commit81ac38847a1d7fdd74a232cae195ff8f0fb4ab21
tree1351c95197c1f8ac96cc05251570a1a2565bf4a3
parent081bfeed5f1b8394d993afa6b0ce20ed3e868960
clk: qcom: Add APCS clock controller support

Add a driver for the APCS clock controller. It is part of the APCS
hardware block, which among other things implements also a combined
mux and half integer divider functionality. It can choose between a
fixed-rate clock or the dedicated APCS (A53) PLL. The source and the
divider can be set both at the same time.

This is required for enabling CPU frequency scaling on MSM8916-based
platforms.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
[sboyd@codeaurora.org: Include rcg header for parent_map, drop
multiple unneeded includes, add COMPILE_TEST to APCS depends,
made tristate/modular]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/qcom/Kconfig
drivers/clk/qcom/Makefile
drivers/clk/qcom/apcs-msm8916.c [new file with mode: 0644]