Merge patch series "RISC-V: Export Zba, Zbb to usermode via hwprobe"
authorPalmer Dabbelt <palmer@rivosinc.com>
Mon, 19 Jun 2023 21:34:40 +0000 (14:34 -0700)
committerPalmer Dabbelt <palmer@rivosinc.com>
Mon, 19 Jun 2023 21:34:40 +0000 (14:34 -0700)
commit16252e018a30486eedcfec81fc313445cac25bea
tree5cddc30da8c3b5c7c71bceb8f90c219d018c5a85
parentf20233852ae295fde59c9a28c4a2087d693de3fb
parentc0baf321038d5fa4273c0dc495d78f39848dd8fc
Merge patch series "RISC-V: Export Zba, Zbb to usermode via hwprobe"

Evan Green <evan@rivosinc.com> says:

This change detects the presence of Zba, Zbb, and Zbs extensions and exports
them per-hart to userspace via the hwprobe mechanism. Glibc can then use
these in setting up hwcaps-based library search paths.

There's a little bit of extra housekeeping here: the first change adds
Zba and Zbs to the set of extensions the kernel recognizes, and the second
change starts tracking ISA features per-hart (in addition to the ANDed
mask of features across all harts which the kernel uses to make
decisions). Now that we track the ISA information per-hart, we could
even fix up /proc/cpuinfo to accurately report extension per-hart,
though I've left that out of this series for now.

* b4-shazam-merge:
  RISC-V: hwprobe: Expose Zba, Zbb, and Zbs
  RISC-V: Track ISA extensions per hart
  RISC-V: Add Zba, Zbs extension probing

Link: https://lore.kernel.org/r/20230509182504.2997252-1-evan@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/riscv/hwprobe.rst
arch/riscv/include/asm/hwcap.h
arch/riscv/include/uapi/asm/hwprobe.h
arch/riscv/kernel/cpu.c
arch/riscv/kernel/cpufeature.c
arch/riscv/kernel/sys_riscv.c