powerpc/powernv: Introduce address translation services for Nvlink2
authorAlistair Popple <alistair@popple.id.au>
Mon, 3 Apr 2017 09:51:44 +0000 (19:51 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 4 Apr 2017 03:27:26 +0000 (13:27 +1000)
commit1ab66d1fbadad86b1f4a9c7857e193af0ee0022c
tree0416486fa6ef85c67e1f679b5df5a110ef68b734
parent4c3b89effc281704d5395282c800c45e453235f6
powerpc/powernv: Introduce address translation services for Nvlink2

Nvlink2 supports address translation services (ATS) allowing devices
to request address translations from an mmu known as the nest MMU
which is setup to walk the CPU page tables.

To access this functionality certain firmware calls are required to
setup and manage hardware context tables in the nvlink processing unit
(NPU). The NPU also manages forwarding of TLB invalidates (known as
address translation shootdowns/ATSDs) to attached devices.

This patch exports several methods to allow device drivers to register
a process id (PASID/PID) in the hardware tables and to receive
notification of when a device should stop issuing address translation
requests (ATRs). It also adds a fault handler to allow device drivers
to demand fault pages in.

Signed-off-by: Alistair Popple <alistair@popple.id.au>
[mpe: Fix up comment formatting, use flush_tlb_mm()]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/book3s/64/mmu.h
arch/powerpc/include/asm/opal-api.h
arch/powerpc/include/asm/opal.h
arch/powerpc/include/asm/powernv.h
arch/powerpc/mm/mmu_context_book3s64.c
arch/powerpc/platforms/powernv/npu-dma.c
arch/powerpc/platforms/powernv/opal-wrappers.S
arch/powerpc/platforms/powernv/pci-ioda.c
arch/powerpc/platforms/powernv/pci.h