arm64: errata: Hide CTR_EL0.DIC on systems affected by Neoverse-N1 #1542419
authorJames Morse <james.morse@arm.com>
Thu, 17 Oct 2019 17:42:58 +0000 (18:42 +0100)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 25 Oct 2019 16:46:40 +0000 (17:46 +0100)
commit05460849c3b51180d5ada3373d0449aea19075e4
tree5bfcc53493c796afc793825f8801159106bdcf27
parent4f5cafb5cb8471e54afdc9054d973535614f7675
arm64: errata: Hide CTR_EL0.DIC on systems affected by Neoverse-N1 #1542419

Cores affected by Neoverse-N1 #1542419 could execute a stale instruction
when a branch is updated to point to freshly generated instructions.

To workaround this issue we need user-space to issue unnecessary
icache maintenance that we can trap. Start by hiding CTR_EL0.DIC.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Documentation/arm64/silicon-errata.rst
arch/arm64/Kconfig
arch/arm64/include/asm/cpucaps.h
arch/arm64/kernel/cpu_errata.c
arch/arm64/kernel/traps.c