X-Git-Url: https://git.kernel.dk/?a=blobdiff_plain;f=crc%2Fcrc32c-intel.c;h=6e810a28f93608dfafcaac4bb6dec03bea526554;hb=a76e1995b08ffe645b2d9f81d258afc38688884b;hp=fc106fa5a9755348e97b5e7dd631267b911061f0;hpb=5d7c5d348d66794fd5e8aa3090f582358e6c5017;p=fio.git

diff --git a/crc/crc32c-intel.c b/crc/crc32c-intel.c
index fc106fa5..6e810a28 100644
--- a/crc/crc32c-intel.c
+++ b/crc/crc32c-intel.c
@@ -1,10 +1,3 @@
-#include <inttypes.h>
-#include <string.h>
-#include <unistd.h>
-#include <stdlib.h>
-#include <signal.h>
-#include <sys/types.h>
-#include <sys/wait.h>
 #include "crc32c.h"
 
 /*
@@ -18,7 +11,9 @@
  * Volume 2A: Instruction Set Reference, A-M
  */
 
-#ifdef ARCH_HAVE_SSE
+bool crc32c_intel_available = false;
+
+#ifdef ARCH_HAVE_SSE4_2
 
 #if BITS_PER_LONG == 64
 #define REX_PRE "0x48, "
@@ -28,8 +23,10 @@
 #define SCALE_F 4
 #endif
 
-uint32_t crc32c_intel_le_hw_byte(uint32_t crc, unsigned char const *data,
-				 unsigned long length)
+static bool crc32c_probed;
+
+static uint32_t crc32c_intel_le_hw_byte(uint32_t crc, unsigned char const *data,
+					unsigned long length)
 {
 	while (length--) {
 		__asm__ __volatile__(
@@ -74,37 +71,17 @@ uint32_t crc32c_intel(unsigned char const *data, unsigned long length)
 	return crc;
 }
 
-static void sig_ill(int sig)
-{
-}
-
-static void crc32c_test(void)
+void crc32c_intel_probe(void)
 {
-	unsigned char buf[4] = { 1, 2, 3, 4 };
-	struct sigaction act;
+	if (!crc32c_probed) {
+		unsigned int eax, ebx, ecx = 0, edx;
 
-	/*
-	 * Check if hw accelerated crc32c is available
-	 */
-	memset(&act, 0, sizeof(act));
-	act.sa_handler = sig_ill;
-	act.sa_flags = SA_RESETHAND;
-	sigaction(SIGILL, &act, NULL);
-
-	(void) crc32c_intel(buf, sizeof(buf));
-}
-
-int crc32c_intel_works(void)
-{
-	if (!fork()) {
-		crc32c_test();
-		exit(0);
-	} else {
-		int status;
+		eax = 1;
 
-		wait(&status);
-		return !WIFSIGNALED(status);
+		do_cpuid(&eax, &ebx, &ecx, &edx);
+		crc32c_intel_available = (ecx & (1 << 20)) != 0;
+		crc32c_probed = true;
 	}
 }
 
-#endif /* ARCH_HAVE_SSE */
+#endif /* ARCH_HAVE_SSE4_2 */