X-Git-Url: https://git.kernel.dk/?a=blobdiff_plain;f=arch%2Farch-x86_64.h;h=d49bcd7f34478f969f4975608624d14be6be8e94;hb=c3e028cacfc9a3f463d572fc3a7a52fc1fe37bef;hp=3ea8070ee619b9bf22476da4d54e792d8bf4c269;hpb=c223da83e253b0057bb029bf4fbb55a05844215c;p=fio.git

diff --git a/arch/arch-x86_64.h b/arch/arch-x86_64.h
index 3ea8070e..d49bcd7f 100644
--- a/arch/arch-x86_64.h
+++ b/arch/arch-x86_64.h
@@ -1,41 +1,35 @@
-#ifndef ARCH_X86_64_h
-#define ARCH_X86_64_h
+#ifndef ARCH_X86_64_H
+#define ARCH_X86_64_H
 
-#define ARCH	(arch_x86_64)
-
-#ifndef __NR_ioprio_set
-#define __NR_ioprio_set		251
-#define __NR_ioprio_get		252
+#ifndef __NR_sys_io_setup2
+#define __NR_sys_io_setup2	335
 #endif
-
-#ifndef __NR_fadvise64
-#define __NR_fadvise64		221
+#ifndef __NR_sys_io_ring_enter
+#define __NR_sys_io_ring_enter	336
 #endif
 
-#ifndef __NR_sys_splice
-#define __NR_sys_splice		275
-#define __NR_sys_tee		276
-#define __NR_sys_vmsplice	278
-#endif
+static inline void do_cpuid(unsigned int *eax, unsigned int *ebx,
+			    unsigned int *ecx, unsigned int *edx)
+{
+	asm volatile("cpuid"
+		: "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
+		: "0" (*eax), "2" (*ecx)
+		: "memory");
+}
 
-#ifndef __NR_async_exec
-#define __NR_async_exec		286
-#define __NR_async_wait		287
-#define __NR_umem_add		288
-#define __NR_async_thread	289
-#endif
+#include "arch-x86-common.h" /* IWYU pragma: export */
 
-#define	FIO_HUGE_PAGE		2097152
+#define FIO_ARCH	(arch_x86_64)
 
-#define FIO_HAVE_SYSLET
+#define	FIO_HUGE_PAGE		2097152
 
 #define nop		__asm__ __volatile__("rep;nop": : :"memory")
 #define read_barrier()	__asm__ __volatile__("lfence":::"memory")
 #define write_barrier()	__asm__ __volatile__("sfence":::"memory")
 
-static inline unsigned int arch_ffz(unsigned int bitmask)
+static inline unsigned long arch_ffz(unsigned long bitmask)
 {
-	__asm__("bsfl %1,%0" :"=r" (bitmask) :"r" (~bitmask));
+	__asm__("bsf %1,%0" :"=r" (bitmask) :"r" (~bitmask));
 	return bitmask;
 }
 
@@ -48,7 +42,38 @@ static inline unsigned long long get_cpu_clock(void)
 }
 
 #define ARCH_HAVE_FFZ
-#define ARCH_HAVE_SSE
+#define ARCH_HAVE_SSE4_2
 #define ARCH_HAVE_CPU_CLOCK
+#define ARCH_HAVE_AIORING
+
+#define RDRAND_LONG	".byte 0x48,0x0f,0xc7,0xf0"
+#define RDSEED_LONG	".byte 0x48,0x0f,0xc7,0xf8"
+#define RDRAND_RETRY	100
+
+static inline int arch_rand_long(unsigned long *val)
+{
+	int ok;
+
+	asm volatile("1: " RDRAND_LONG "\n\t"
+		     "jc 2f\n\t"
+		     "decl %0\n\t"
+		     "jnz 1b\n\t"
+		     "2:"
+		     : "=r" (ok), "=a" (*val)
+		     : "0" (RDRAND_RETRY));
+
+	return ok;
+}
+
+static inline int arch_rand_seed(unsigned long *seed)
+{
+	unsigned char ok;
+
+	asm volatile(RDSEED_LONG "\n\t"
+			"setc %0"
+			: "=qm" (ok), "=a" (*seed));
+
+	return 0;
+}
 
 #endif