Merge branch 'fix/intel' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...

[linux-2.6-block.git] / sound / soc / intel / sst-haswell-dsp.c

diff --git a/sound/soc/intel/sst-haswell-dsp.c b/sound/soc/intel/sst-haswell-dsp.c
index f6e1e6b2b18ec82502ce792ad6c6306d3b11a24d..402b728c0a06479213425c2daf88eafe4caa2877 100644 (file)
--- a/sound/soc/intel/sst-haswell-dsp.c
+++ b/sound/soc/intel/sst-haswell-dsp.c
@@ -303,7 +303,7 @@ static void hsw_reset(struct sst_dsp *sst)
 static int hsw_set_dsp_D0(struct sst_dsp *sst)
 {
        int tries = 10;
-       u32 reg;
+       u32 reg, fw_dump_bit;
 
        /* Disable core clock gating (VDRTCTL2.DCLCGE = 0) */
        reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);
@@ -365,7 +365,9 @@ finish:
        can't be accessed, please enable each block before accessing. */
        reg = readl(sst->addr.pci_cfg + SST_VDRTCTL0);
        reg |= SST_VDRTCL0_DSRAMPGE_MASK | SST_VDRTCL0_ISRAMPGE_MASK;
-       writel(reg, sst->addr.pci_cfg + SST_VDRTCTL0);
+       /* for D0, always enable the block(DSRAM[0]) used for FW dump */
+       fw_dump_bit = 1 << SST_VDRTCL0_DSRAMPGE_SHIFT;
+       writel(reg & ~fw_dump_bit, sst->addr.pci_cfg + SST_VDRTCTL0);
 
 
        /* disable DMA finish function for SSP0 & SSP1 */
@@ -488,6 +490,7 @@ static const struct sst_sram_shift sram_shift[] = {
        {SST_DEV_ID_LYNX_POINT, 6, 16}, /* lp */
        {SST_DEV_ID_WILDCAT_POINT, 2, 12}, /* wpt */
 };
+
 static u32 hsw_block_get_bit(struct sst_mem_block *block)
 {
        u32 bit = 0, shift = 0, index;
@@ -584,7 +587,9 @@ static int hsw_block_disable(struct sst_mem_block *block)
 
        val = readl(sst->addr.pci_cfg + SST_VDRTCTL0);
        bit = hsw_block_get_bit(block);
-       writel(val | bit, sst->addr.pci_cfg + SST_VDRTCTL0);
+       /* don't disable DSRAM[0], keep it always enable for FW dump*/
+       if (bit != (1 << SST_VDRTCL0_DSRAMPGE_SHIFT))
+               writel(val | bit, sst->addr.pci_cfg + SST_VDRTCTL0);
 
        /* wait 18 DSP clock ticks */
        udelay(10);
@@ -609,7 +614,7 @@ static int hsw_init(struct sst_dsp *sst, struct sst_pdata *pdata)
        const struct sst_adsp_memregion *region;
        struct device *dev;
        int ret = -ENODEV, i, j, region_count;
-       u32 offset, size;
+       u32 offset, size, fw_dump_bit;
 
        dev = sst->dma_dev;
 
@@ -666,9 +671,11 @@ static int hsw_init(struct sst_dsp *sst, struct sst_pdata *pdata)
                }
        }
 
+       /* always enable the block(DSRAM[0]) used for FW dump */
+       fw_dump_bit = 1 << SST_VDRTCL0_DSRAMPGE_SHIFT;
        /* set default power gating control, enable power gating control for all blocks. that is,
        can't be accessed, please enable each block before accessing. */
-       writel(0xffffffff, sst->addr.pci_cfg + SST_VDRTCTL0);
+       writel(0xffffffff & ~fw_dump_bit, sst->addr.pci_cfg + SST_VDRTCTL0);
 
        return 0;
 }